Jordi Cosp Vilella's homepage

CONTACT DETAILS

Address: Jordi COSP VILELLA
Electronic Engineering Department
Universitat Politècnica de Catalunya (UPC) BarcelonaTech
C/ Eduard Maristany, 10-14
08019 - BARCELONA (Spain)
Phone: +34 93 413 74 92 (desk) / +34 93 413 70 05 (lab)
Fax: +34 93 413 74 01

e-mail: jordi.cosp'-at-'upc.edu please remove '-at-' and place @ to get the correct address

RESEARCH PROJECTS

PUBLICATIONS:

Journals - Books and book chapters - Conferences - PhD Thesis

JOURNALS

• J. Cosp, S. Binczak, J. Madrenas, D. Fernandez, Realistic Model of Compact VLSI FitzHugh-Nagumo Oscillators, International Journal of Electronics, Vol. 101, Issue 2, pp. 220-230, February 2014
  

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• D. Fernandez, J. Madrenas, J. Cosp, A self-test and dynamics characterization circuit for MEMS electrostatic
  actuators, Microelectronics Reliability, Vol. 51, Issue 3, pp. 602-609, March 2011

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• J. Madrenas, D. Fernandez, J. Cosp, L. Martínez, E. Alarcon, E. Vidal, G. Villar, Self-controlled 4-transistor
  low-power min-max current selector, AEU: international journal of electronics and communications. Vol. 63
  Issue 10, pp. 871-876, October 2009
  

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• J.Cosp, S.Binczak, Programmable VLSI Cubic-Like Function Implementation, Electronics Letters, Vol. 42, Issue 21, pp. 1221 - 1222,October 2006
  

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• J.Cosp, J.Madrenas, D.Fernández, Design and Basic Blocks of a Neuromorphic VLSI Analogue Vision System, Neurocomputing, Vol. 69, Issues 16-18, pp.1962-1970, 2006

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• G.Villar,  E.Alarcón, E.Vidal, J.Cosp, J. Madrenas, Synchronizable Compact CMOS Oscillator, Analog Integrated Circuits and Signal Processing, Vol. 42, Issue 2, pp. 179-183, 2005.

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• J.Cosp, J. Madrenas, E.Alarcón, E.Vidal, G.Villar, Synchronization of Nonlinear Electronic Oscillators for Neural Computation, IEEE Transactions on Neural Networks, Vol. 15, Issue 3, pp. 1315-1327, May 2004.

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• J.Cosp, J. Madrenas, Scene Segmentation Using Neuromorphic Oscillatory Networks, IEEE Transactions on Neural Networks, Vol. 14, Issue 5, pp. 1278-1296, September 2003.

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BOOKS and BOOK CHAPTERS

• J.M.Moreno, J.Madrenas, J.Cosp (Eds.), Evolvable Systems: from Biology to Hardware, Proceedings of the 6th Int. Conf. on, Sitges, Spain, September 2005.

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• J. Cosp, J. Madrenas, J.M. Moreno, J. Cabestany, Analog VLSI Implementation of a Relaxation Oscillator for Neuromorphic Networks, Neuromorphic Systems. Engineering Silicon from Neurobiology. L. S. Smith, A. Hamilton (eds.), pp. 197-208, World Scientific, 1998.

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CONFERENCES

• J. Cosp, H. Martinez, Design of an On-Chip Linear-Assisted DC-DC Voltage Regulator, 20th IEEE International Conference on Electronics, Circuits and Systems 2013 (ICECS 2013), Institute of Electrical and Electronics Engineers (IEEE), 2013, pp. 353-356
  

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• J. Cosp, H. Martinez, On chaotic behavior in automatic tuning loops for continuous-time filters, 21st European Conference on Circuit Theory and Design (ECCTD 2013), 2013, pp.1-4
  

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• H. Martinez, J. Cosp, M. Manzanares, Observation of chaotic behavior in automatic tuning loops for continuous time filters. Proceedings of the 56th  Midwest Symposium on Circuits and Systems 2013 (MWSCAS 2013), Institute of Electrical and Electronics Engineers (IEEE), 2013, pp. 742-745.
  

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• C. Li, J. Cosp, H. Martinez, Field programmable switched capacitor voltage converter. 19th IEEE International Conference on Electronics, Circuits and Systems 2012 (ICECS 2012), Institute of Electrical and Electronics Engineers (IEEE), 2012, pp. 865-868

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• H. Martinez, J. Cosp, Field Programmable Switched Capacitor Voltage, Proceedings of the IEEE 55th International Midwest Symposium on Circuits and Systems 2012 (MWSCAS 2012). IEEE Press. August 2012.

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• J. Madrenas, D. Fernandez, J. Cosp, M. Moreno, L. Martínez, G. Sanchez, Bioinspired sensory integration for environment-perception embedded systems, 4th International Joint Conference on Biomedical Engineering Systems and Technologies (BIOSTEC 2011) 2011.

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• R. Benitez, J. Cosp, Non-ideal behavior in the electronic implementation of chaotic dynamical systems, Emerging Topics in Dynamical Systems and Partial Differential Equations (DSPDE'10) 2010.

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• J. Madrenas, D. Fernandez, J. Cosp, A low-voltage current sorting circuit based on 4-T min-max CMOS switch, 17th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2010). 2010.

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• C. Mora, J. Cosp, Analysis and Modelling of Programable Capacitor Arrays for Switched-Capacitor Applications, Proceedings of the XXIII Design of Circuits and Integrated Systems Conference (DCIS'08), 2008
  

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• D. Fernandez, J. Madrenas, J. Cosp, Position, Damping and Inertia Control of Parallel-Plate Electrostatic Actuators, Proceedings of the 2008 IEEE International Symposium on Circuits and Systems (ISCAS 2008). IEEE. 2008.

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• J. Cosp, S. Binczak, J. Madrenas, D. Fernández, Implementation of Compact VLSI FitzHugh-Nagumo Neurons, Proceedings of the 2008 IEEE International Symposium on Circuits and Systems (ISCAS 2008). IEEE. 2008.

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• J. Madrenas, P. Balsach, D. Fernandez, J. Cosp, L. Alvarado, ChMiST: Flexible Enviornment for Automated Characterization of Mixed-Signal Testchips, Proceedings of the XXII Conference on Design of Circuits and Integrated Systems (DCIS'07), 2007

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• J. Cosp, S. Binczak, Implementation of a Compact Analogue CMOS Neural Oscillator, Proceedings of the XXI Conference on Design of Circuits and Integrated Systems (DCIS'06), November 2006

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• J. Madrenas, D. Fernandez, J. Cosp, Resistive trans-fuse and differential resistor for common-mode-tolerant nonlinear space filtering, Proceedings of the XXI Conference on Design of Circuits and Integrated Systems (DCIS'06), November 2006
  

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• R. Calatayud, J. Cosp, Simple Implementation of a Programmable Nonlinear Diffusive Electrical Lattice, Proceedings of the XXI Design of Circuits and Integrated Systems Conference (DCIS'06), November 2006.

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• D. Fernandez, G. Villar, E.M. Vidal, E. Alarcon, J. Cosp, J. Madrenas, Mismatch-tolerant CMOS oscillator and excitatory synapse for bioinspired image segmentation, Proceedings of the 2005 IEEE Int. Symp. on Circuits and Systems (ISCAS 2005), Vol. 4, pp. 4114-4117, Osaka, Japan, May 2005.

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• J. Madrenas, D. Fernández, J. Cosp, E. Alarcón, E.M. Vidal, G. Villar, Selective Similarity Function for VLSI Analog Signal Processing, Proceedings of the 2005 IEEE Int. Symp. on Circuits and Systems (ISCAS 2005), Vol. 4, pp. 3926-3929, Osaka, Japan, May 2005.

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• J. Cosp, J. Madrenas, O. Lucas, E. Alarcón, E.M. Vidal, G. Villar, Architecture and Basic Blocks of a Neuromorphic Analogue VLSI Vision System, Proceedings of the 1st Brain Inspired Cognitive Systems 2004 (BICS2004), Stirling, Scotland, UK, August 2004.

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• J.Cosp, J. Madrenas, Electronic Implementation of Oscillators for Visual Algorithms; Early Cognitive Vision Workshop, Electronic Proceedings, Sabhal Mor Ostaig, Isle of Skye, Scotland, UK, May 2004.

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• J.Madrenas, J.Cosp, O.Lucas, E.Alarcón, E.Vidal, G.Villar BIOSEG: A Bioinspired VLSI Analog System for Image Segmentation, Proceedings of the Twelfth European Symposium on Artificial Neural Networks (ESANN'2004), pp. 411-416, Bruges, Belgium, April 2004.

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• J.Cosp, J. Madrenas, A Microelectronic Implementation of a Bioinspired Analog Matrix for Object Segmentation of a Visual Scene;, Proceedings of the Ninth European Symposium on Artificial Neural Networks (ESANN'2001), pp. 69-74, Bruges, Belgium, April 2001.

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• J. Madrenas, E. Alarcón, J. Cosp, J.M. Moreno, A. Poveda, J. Cabestany, Mixed-Signal VLSI for Neural and Fuzzy Sequential Processors;, Proceedings of the 2000 IEEE International Symposium on Circuits and Systems (ISCAS'2000), pp. V.389-V.392, Geneva, Switzerland, May 2000.

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• J. Madrenas, E. Alarcón, J. Cosp, J.M. Moreno, A. Poveda, J. Cabestany, Design Space Tradeoff in VLSI Implementations of Mixed-Signal Neuro-Fuzzy Processors, Proceedings of the Fifth International Symposium on Artificial Life and Robotics (AROB 5th'00), pp. 821-824, Oita, Japan, January 2000.

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• J. Cosp, J. Madrenas, A Compact Astable Oscillator Network for Scene Segmentation, Proceedings of the XIV Design of Circuits and Integrated Systems Conference (DCIS'99), pp. 801-806, Palma de Mallorca, Spain, November 1999.

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• J. Madrenas, E. Alarcón, J. Cosp, J.M. Moreno, A. Poveda, J. Cabestany, VLSI Design Constraints for Neural and Fuzzy Mixed-Signal Sequential Processors, Proceedings of the XIV Design of Circuits and Integrated Systems Conference (DCIS'99), pp. 163-167, Palma de Mallorca, Spain, November 1999.

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• J. Cosp, J. Madrenas, A Neural Network for Scene Segmentation Based on Compact Astable Oscillators;, Proceedings of the 9th International Conference on Artificial Neural Networks (ICANN'99), pp. 690-695, Edinburgh, UK, September 1999.

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• J. Madrenas, E. Alarcón, J. Cosp, J.M. Moreno, VLSI Design of a Flexible - Structure Sequential Mixed-Signal Neural Processor, Proceedings of the 6th Conference Mixed Design of Integrated Circuits and Systems (MIXDES'99), pp. 259-264, Kraków, Poland, June 1999.

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• E. Alarcón, J. Madrenas, J.M. Moreno, J. Cosp, S. Gomáriz, F. Guinjoan, A. Poveda, Mixed-Signal Implementation of a Discrete-Time Takagi-Sugeno Neurofuzzy Controller, Proceedings of the 6th Conference Mixed Design of Integrated Circuits and Systems (MIXDES'99), pp. 389-394, Kraków, Poland, June 1999.

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• J. Cosp, J. Madrenas, J. Cabestany, A VLSI Implementation of a Neuromorphic Network for Scene Segmentation, Proceedings of the 7th International Conference on Microelectronics for Neural, Fuzzy and Bio-inspired Systems (MicroNeuro'99), pp. 403-408, Granada, Spain, April 1999.

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• J. Madrenas, E. Alarcon, J.M. Moreno, J. Cosp, A Current-Mode Sequential CMOS A/D Variable-Structure Processor for Neural Networks Emulation, Proceedings of the XIII Design of Circuits and Integrated Systems Conference (DCIS'98), pp. 536-541, Madrid, Spain, November 1998.

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PhD THESIS:

Title: SCENE SEGMENTATION USING OSCILLATORY NEUROMORPHIC NETWORKS

Date: July 2002

Abstract:

This dissertation describes and analyzes a hardware model of an artificial neural network based on coupled oscillators that have been adapted to fit VLSI requirements and its applications to scene segmentation tasks. To reduce area overhead and power consumption, neurons, which are modeled as astable oscillators, are implemented on a full custom ASIC instead of being simulated on a standard hardware architecture. The implementation of a physical oscillator instead of their simulation, allows the system to perform the same tasks and reduce power consumption compared to requirements needed for a computer to simulate the network.
First, a current-mode astable oscillator is modeled as an integrator and a hysteresis comparator. Then, this scheme is used to study algebraically and numerically the synchronization of excitatory coupled oscillators with and without external inhibition and mismatch. After this, the analysis is repeated with an improved model composed of two integrators with different timescales. This allows us to simulate secondary effects as oscillator output capacitance. From these results, the behavior of one-dimensional and two-dimensional arrays of coupled oscillators is studied and then, the network is applied to synthetic image segmentation.
Based on results of the mathematical analysis, a microelectronic network is designed on a double-poly 0.8µm CMOS ASIC. This circuit is described and extensively simulated to check its functionality as a segmentation layer. Then, experimental results validate the network functionality as a segmentation network and confirm the importance of secondary effects modeled in the mathematical analysis section. Finally, this dissertation ends with an estimation of the scheme complexity, compares it to other methods, sets out concluding remarks and explores future trends on implementation of neuromorphic segmentation schemes.
Mathematical analysis and simulations demonstrate that astable oscillators can be used as basic cells of segmentation networks. They also demonstrate that delays due to cell output capacitance combined with device mismatch have to be limited below certain boundaries for the network to work properly. The physical implementation of a neuron model based on a non-linear oscillator demonstrates that it is possible to implement an oscillatory segmentation scheme that runs much faster that its simulated counterpart on powerful computers.

TEACHING

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EEBE	Escola d'Enginyeria de Barcelona Est

• Digital Electronics
• Digital and Microelectronic Design
• Propostes TFG (Treball de Fi de Grau)
• TFG (Treball de Fi de Grau) [Historial]
• Opinió ELDI

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Escola Tècnica Superior d'Enginyeria de Telecomunicació de Barcelona (ETSETB) (Enginyeria Electrònica)

• Micro and Nanoelectronic Design
• Analog and Mixed-Signal System-On-Chip Design